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lt1167 1 1167fb typical application features description single resistor gain programmable, precision instrumentation amplifier the lt ? 1167 is a low power, precision instrumentation amplifier that requires only one external resistor to set gains of 1 to 10,000. the low voltage noise of 7.5nv/ hz (at 1khz) is not compromised by low power dissipation (0.9ma typical for 2.3v to 15v supplies). the parts high accuracy (10ppm maximum nonlinearity, 0.08% max gain error (g = 10)) is not degraded even for load resistors as low as 2k. the lt1167 is laser trimmed for very low input offset voltage (40v max), drift (0.3v/c), high cmrr (90db, g = 1) and psrr (105db, g = 1). low input bias currents of 350pa max are achieved with the use of superbeta processing. the output can handle capacitive loads up to 1000pf in any gain configuration while the inputs are esd protected up to 13kv (human body). the lt1167 with two external 5k resistors passes the iec 1000-4-2 level 4 specification. the lt1167, offered in 8-pin pdip and so packages, re - quires significantly less pc board area than discrete multi op amp and resistor designs. the lt1167-1 offers the same performance as the lt1167, but its input current characteristic at high common mode voltage better supports applications with high input imped - ance (see the applications information section). single supply barometer applications n single gain set resistor: g = 1 to 10,000 n gain error: g = 10, 0.08% max n input offset voltage drift: 0.3v/c max n meets iec 1000-4-2 level 4 esd tests with two external 5k resistors n gain nonlinearity: g = 10, 10ppm max n input offset voltage: g = 10, 60v max n input bias current: 350pa max n psrr at g = 1: 105db min n cmrr at g = 1: 90db min n supply current: 1.3ma max n wide supply range: 2.3v to 18v n 1khz voltage noise: 7.5nv/ hz n 0.1hz to 10hz noise: 0.28v p-p n available in 8-pin pdip and so packages n bridge amplifiers strain gauge amplifers thermocouple amplifers differential to single-ended converters medical instrumentation l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. ? + + ? ? + 2 1 1 1 1 2 r5 392k r4 50k offset adjust r3 50k r8 100k r6 1k lt1634ccz-1.25 8 4 1/2 lt1490 3 r set 0.2% accuracy at 25c 1.2% accuracy at 0c to 60c v s = 8v to 30v 5k 5k 5k 5k v s 5 4 3 2 ? + 7 1/2 lt1490 5 6 2 8 lucas nova senor npc-1220-015-a-3l 7 v s 6 1167 ta01 5 to 4-digit dvm 4 r2 12 lt1167 g = 60 r1 825 3 6 r7 50k volts 2.800 3.000 3.200 inches hg 28.00 30.00 32.00 output voltage (2v/div) nonlinearity (100ppm/div) 1167 ta02 g = 1000 r l = 1k v out = 10v gain nonlinearity
lt1167 2 1167fb absolute maximum ratings supply voltage ...................................................... 20v differential input voltage (within the supply voltage) ...................................................... 40v input voltage (equal to supply voltage) ................. 20v input current (note 3) .......................................... 20ma output short-circuit duration ......................... indefnite operating temperature range ................. C40c to 85c specifed temperature range lt1167ac/lt1167c/ lt1167ac-1/lt1167c-1 (note 4) ............ 0c to 70c lt1167ai/lt1167i/ lt1167ai-1/lt1167i-1 ........................ C40c to 85c storage temperature range ................... C65c to 150c lead temperature (soldering, 10 sec) .................. 300c (note 1) order information pin configuration 1 2 3 4 8 7 6 5 top view r g ?in +in ?v s r g +v s output ref n8 package 8-lead pdip + ? s8 package 8-lead plastic so t jmax = 150c, ja = 130c/w (n8) t jmax = 150c, ja = 190c/w (s8) lead free finish tape and reel part marking package description specified temperature range lt1167acn8#pbf lt1167acn8#trpbf lt1167ac 8-lead pdip 0c to 70c lt1167acs8#pbf lt1167acs8#trpbf 1167a 8-lead plastic so 0c to 70c lt1167ain8#pbf lt1167ain8#trpbf lt1167ai 8-lead pdip C40c to 85c lt1167ais8#pbf lt1167ais8#trpbf 1167ai 8-lead plastic so C40c to 85c lt1167cn8#pbf lt1167cn8#trpbf lt1167c 8-lead pdip 0c to 70c lt1167cs8#pbf lt1167cs8#trpbf 1167 8-lead plastic so 0c to 70c lt1167in8#pbf lt1167in8#trpbf lt1167i 8-lead pdip C40c to 85c lt1167is8#pbf lt1167is8#trpbf 1167i 8-lead plastic so C40c to 85c lt1167cs8-1#pbf lt1167cs8-1#trpbf 11671 8-lead plastic so 0c to 70c lt1167is8-1#pbf lt1167is8-1#trpbf 11671 8-lead plastic so C40c to 85c lt1167acs8-1#pbf lt1167acs8-1#trpbf 11671 8-lead plastic so 0c to 70c lt1167ais8-1#pbf lt1167ais8-1#trpbf 11671 8-lead plastic so C40c to 85c lead based finish tape and reel part marking package description specified temperature range lt1167acn8 lt1167acn8#tr lt1167ac 8-lead pdip 0c to 70c lt1167acs8 lt1167acs8#tr 1167a 8-lead plastic so 0c to 70c lt1167ain8 lt1167ain8#tr lt1167ai 8-lead pdip C40c to 85c lt1167ais8 lt1167ais8#tr 1167ai 8-lead plastic so C40c to 85c lt1167cn8 lt1167cn8#tr lt1167c 8-lead pdip 0c to 70c lt1167cs8 lt1167cs8#tr 1167 8-lead plastic so 0c to 70c lt1167in8 lt1167in8#tr lt1167i 8-lead pdip C40c to 85c lt1167is8 lt1167is8#tr 1167i 8-lead plastic so C40c to 85c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
lt1167 3 1167fb electrical characteristics v s = 15v, v cm = 0v, t a = 25c, r l = 2k, unless otherwise noted. symbol parameter conditions (note 7) lt1167ac/ltc1167ai lt1167ac-1/ltc1167ai-1 lt1167c/ltc1167i lt1167c-1/ltc1167i-1 units min typ max min typ max g gain range g = 1 + (49.4k/r g ) 1 10k 1 10k gain error g = 1 g = 10 (note 2) g = 100 (note 2) g = 1000 (note 2) 0.008 0.010 0.025 0.049 0.02 0.08 0.08 0.10 0.015 0.020 0.030 0.040 0.03 0.10 0.10 0.10 % % % % gain nonlinearity (note 5) v o = 10v, g = 1 v o = 10v, g = 10 and 100 v o = 10v, g = 1000 1 2 15 6 10 40 1.5 3 20 10 15 60 ppm ppm ppm v o = 10v, g = 1, r l = 600 v o = 10v, g = 10 and 100, r l = 600 v o = 10v, g = 1000, r l = 600 5 6 20 12 15 65 6 7 25 15 20 80 ppm ppm ppm v ost total input referred offset voltage v ost = v osi + v oso /g v osi input offset voltage g = 1000, v s = 5v to 15v 15 40 20 60 v v oso output offset voltage g = 1, v s = 5v to 15v 40 200 50 300 v i os input offset current 90 320 100 450 pa i b input bias current 50 350 80 500 pa e n input noise voltage (note 8) 0.1hz to 10hz, g = 1 0.1hz to 10hz, g = 10 0.1hz to 10hz, g = 100 and 1000 2.00 0.50 0.28 2.00 0.50 0.28 v p-p v p-p v p-p total rti noise = e ni 2 + (e no /g) 2 (note 8) e ni input noise voltage density (note 8) f o = 1khz 7.5 12 7.5 12 nv/ hz e no output noise voltage density (note 8) f o = 1khz (note 3) 67 90 67 90 nv/ hz i n input noise current f o = 0.1hz to 10hz 10 10 pa p-p input noise current densty f o = 10hz 124 124 fa/hz r in input resistance v in = 10v 200 1000 200 1000 g c in(diff) differential input capacitance f o = 100khz 1.6 1.6 pf c in(cm) common mode input capacitance f o = 100khz 1.6 1.6 pf v cm input voltage range g = 1, other input grounded v s = 2.3v to 5v v s = 5v to 18v Cv s + 1.9 Cv s + 1.9 +v s C 1.2 +v s C 1.4 Cv s + 1.9 Cv s + 1.9 +v s C 1.2 +v s C 1.4 v v cmrr common mode rejection ratio 1k source imbalance, v cm = 0v to 10v g = 1 g = 10 g = 100 g = 1000 90 106 120 126 95 115 125 140 85 100 110 120 95 115 125 140 db db db db psrr power supply rejection ratio v s = 2.3v to 18v g = 1 g = 10 g = 100 g = 1000 105 125 131 135 120 135 140 150 100 120 126 130 120 135 140 150 db db db db i s supply current v s = 2.3v to 18v 0.9 1.3 0.9 1.3 ma v out output voltage swing r l = 10k v s = 2.3v to 5v v s = 5v to 18v Cv s + 1.1 Cv s + 1.2 +v s C 1.2 +v s C 1.3 Cv s + 1.1 Cv s + 1.2 +v s C 1.2 +v s C 1.3 v v
lt1167 4 1167fb electrical characteristics v s = 15v, v cm = 0v, t a = 25c, r l = 2k, unless otherwise noted. the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v s = 15v, v cm = 0v, 0c t a 70c, r l = 2k, unless otherwise noted. symbol parameter conditions (note 7) lt1167ac/ltc1167ai lt1167ac-1/ltc1167ai-1 lt1167c/ltc1167i lt1167c-1/ltc1167i-1 units min typ max min typ max i out output current 20 27 20 27 ma bw bandwidth g = 1 g = 10 g = 100 g = 1000 1000 800 120 12 1000 800 120 12 khz khz khz khz sr slew rate g = 1, v out = 10v 0.75 12 0.75 1.2 v/s settling time to 0.01% 10v step g = 1 to 100 g = 1000 14 130 14 130 s s r refin reference input resistance 20 20 k i refin reference input current v ref = 0v 50 50 a v ref reference voltage range Cv s + 1.6 +v s C 1.6 Cv s + 1.6 +v s C 1.6 v a vref reference gain to output 1 0.0001 1 0.0001 symbol parameter conditions (note 7) lt1167ac/lt1167ac-1 lt1167c/lt1167c-1 units min typ max min typ max gain error g = 1 g = 10 (note 2) g = 100 (note 2) g = 1000 (note 2) l l l l 0.01 0.08 0.09 0.14 0.03 0.30 0.30 0.33 0.012 0.100 0.120 0.140 0.04 0.33 0.33 0.35 % % % % gain nonlinearity v out = 10v, g = 1 v out = 10v, g = 10 and 100 v out = 10v, g = 1000 l l l 1.5 3 20 10 15 60 3 4 25 15 20 80 ppm ppm ppm g/t gain vs temperature g < 1000 (note 2) l 20 50 20 50 ppm/c v ost total input referred offset voltage v ost = v osi + v oso /g v osi input offset voltage v s = 5v to 15v l 18 60 23 80 v v osih input offset voltage hysteresis (notes 3, 6) 3.0 3.0 v v oso output offset voltage v s = 5v to 15v l 60 380 70 500 v v osoh output offset voltage hysteresis (notes 3, 6) 30 30 v v osi /t input offset drift (note 8) (note 3) l 0.05 0.3 0.06 0.4 v/c v oso /t output offset drift (note 3) l 0.7 3 0.8 4 v/c i os input offset current l 100 400 120 550 pa i os /t input offset current drift l 0.3 0.4 pa/c i b input bias current l 75 450 105 600 pa i b /t input bias current drift l 0.4 0.4 pa/c v cm input voltage range g = 1, other input grounded v s = 2.3v to 5v v s = 5v to 18v l l Cv s +2.1 Cv s +2.1 +v s C1.3 +v s C1.4 Cv s +2.1 Cv s +2.1 +v s C1.3 +v s C1.4 v v cmrr common mode rejection ratio 1k source imbalance, v cm = 0v to 10v g = 1 g = 10 g = 100 g = 1000 l l l l 88 100 115 117 92 110 120 135 83 97 113 114 92 110 120 135 db db db db
lt1167 5 1167fb the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v s = 15v, v cm = 0v, C40c t a 85c, r l = 2k, unless otherwise noted. symbol parameter conditions (note 7) lt1167ai/lt1167ai-1 lt1167i/lt1167i-1 units min typ max min typ max gain error g = 1 g = 10 (note 2) g = 100 (note 2) g = 1000 (note 2) l l l l 0.014 0.130 0.140 0.160 0.04 0.40 0.40 0.40 0.015 0.140 0.150 0.180 0.05 0.42 0.42 0.45 % % % % g n gain nonlinearity (notes 2, 4) v o = 10v, g = 1 v o = 10v, g = 10 and 100 v o = 10v, g = 1000 l l l 2 5 26 15 20 70 3 6 30 20 30 100 ppm ppm ppm g/t gain vs temperature g < 1000 (note 2) l 20 50 20 50 ppm/c v ost total input referred offset voltage v ost = v osi + v oso /g v osi input offset voltage l 20 75 25 100 v v osih input offset voltage hysteresis (notes 3, 6) 3.0 3.0 v v oso output offset voltage l 180 500 200 600 v v osoh output offset voltage hysteresis (notes 3, 6) 30 30 v v osi /t input offset drift (note 8) (note 3) l 0.05 0.3 0.06 0.4 v/c v oso /t output offset drift (note 3) l 0.8 5 1 6 v/c i os input offset current l 110 550 120 700 pa i os /t input offset current drift l 0.3 0.3 pa/c i b input bias current l 180 600 220 800 pa i b /t input bias current drift l 0.5 0.6 pa/c v cm input voltage range v s = 2.3v to 5v v s = 5v to 18v l l Cv s +2.1 Cv s +2.1 +v s C1.3 +v s C1.4 Cv s +2.1 Cv s +2.1 +v s C1.3 +v s C1.4 v v cmrr common mode rejection ratio 1k source imbalance, v cm = 0v to 10v g = 1 g = 10 g = 100 g = 1000 l l l l 86 98 114 116 90 105 118 133 81 95 112 112 90 105 118 133 db db db db electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v s = 15v, v cm = 0v, 0c t a 70c, r l = 2k, unless otherwise noted. symbol parameter conditions (note 7) lt1167ac/lt1167ac-1 lt1167c/lt1167c-1 units min typ max min typ max psrr power supply rejection ratio v s = 2.3v to 18v g = 1 g = 10 g = 100 g = 1000 l l l l 103 123 127 129 115 130 135 145 98 118 124 126 115 130 135 145 db db db db i s supply current v s = 2.3v to 18v l 1.0 1.5 1.0 1.5 ma v out output voltage swing r l = 10k v s = 2.3v to 5v v s = 5v to 18v l l Cv s +1.4 Cv s +1.6 +v s C1.3 +v s C1.5 Cv s +1.4 Cv s +1.6 +v s C1.3 +v s C1.5 v v i out output current l 16 21 16 21 ma sr slew rate g = 1, v out = 10v l 0.65 1.1 0.65 1.1 v/s v ref ref voltage range (note 3) l Cv s +1.6 +v s C1.6 Cv s +1.6 +v s C1.6 v
lt1167 6 1167fb electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v s = 15v, v cm = 0v, 0c t a 70c, r l = 2k, unless otherwise noted. symbol parameter conditions (note 7) lt1167ai/lt1167ai-1 lt1167i/lt1167i-1 units min typ max min typ max psrr power supply rejection ratio v s = 2.3v to 18v g = 1 g = 10 g = 100 g = 1000 l l l l 100 120 125 128 112 125 132 140 95 115 120 125 112 125 132 140 db db db db i s supply current l 1.1 1.6 1.1 1.6 ma v out output voltage swing v s = 2.3v to 5v v s = 5v to 18v l l Cv s +1.4 Cv s +1.6 +v s C1.3 +v s C1.5 Cv s +1.4 Cv s +1.6 +v s C1.3 +v s C1.5 v v i out output current l 15 20 15 20 ma sr slew rate g = 1, v out = 10v l 0.55 0.95 0.55 0.95 v/s v ref ref voltage range (note 3) l Cv s +1.6 +v s C1.6 Cv s +1.6 +v s C1.6 v note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: does not include the effect of the external gain resistor rg. note 3: this parameter is not 100% tested. note 4: the lt1167ac/lt1167c/lt1167ac-1/lt1167c-1 are designed, characterized and expected to meet the industrial temperature limits, but are not tested at C40c and 85c. i-grade parts are guaranteed. note 5: this parameter is measured in a high speed automatic tester that does not measure the thermal effects with longer time constants. the magnitude of these thermal effects are dependent on the package used, heat sinking and air flow conditions. note 6: hysteresis in offset voltage is created by package stress that differs depending on whether the ic was previously at a higher or lower temperature. offset voltage hysteresis is always measured at 25c, but the ic is cycled to 85c i-grade (or 70c c-grade) or C40c i-grade (0c c-grade) before successive measurement. 60% of the parts will pass the typical limit on the data sheet. note 7: typical parameters are defined as the 60% of the yield parameter distribution. note 8: referred to input.
lt1167 7 1167fb typical performance characteristics distribution of input offset voltage, t a = C 40c distribution of input offset voltage, t a = 25c distribution of input offset voltage, t a = 85c gain nonlinearity, g = 1 gain nonlinearity, g = 1000 gain nonlinearity, g = 10 gain nonlinearity vs temperature gain nonlinearity, g = 100 gain error vs temperature output voltage (2v/div) nonlinearity (1ppm/div) 1167 g01 g = 1 r l = 2k v out = 10v output voltage (2v/div) nonlinearity (10ppm/div) 1167 g02 g = 10 r l = 2k v out = 10v output voltage (2v/div) nonlinearity (10ppm/div) 1167 g03 g = 100 r l = 2k v out = 10v output voltage (2v/div) nonlinearity (100ppm/div) 1167 g04 g = 1000 r l = 2k v out = 10v temperature (c) ? 50 nonlinearity (ppm) 70 25 1167 g05 40 20 ? 25 0 50 10 0 80 60 50 30 75 100 150 g = 1000 g = 100 g = 1, 10 v s = 15v v out = ? 10v to 10v r l = 2k temperature (c) ? 50 gain error (%) ? 0.20 ? 0.10 ? 0.05 0 50 0.20 1167 g06 ? 0.15 0 ? 25 75 g = 1 25 100 0.05 0.10 0.15 v s = 15v v out = 10v r l = 2k *does not include temperature effects of r g g = 10* g = 1000* g = 100* input offset voltage (v) ? 80 percent of units (%) 20 30 1167 g40 10 0 ? 60 ? 40 ? 20 20 40 60 0 40 15 25 5 35 v s = 15v g = 1000 137 n8 (2 lots) 165 s8 (3 lots) 302 total parts input offset voltage (v) ? 60 ? 40 ? 20 0 20 40 60 percent of units (%) 20 25 30 1167 g41 15 10 0 5 v s = 15v g = 1000 137 n8 (2 lots) 165 s8 (3 lots) 302 total parts input offset voltage (v) ? 80 percent of units (%) 20 30 1167 g42 10 0 ? 60 ? 40 ? 20 20 40 60 0 40 15 25 5 35 v s = 15v g = 1000 137 n8 (2 lots) 165 s8 (3 lots) 302 total parts
lt1167 8 1167fb typical performance characteristics distribution of input offset voltage drift distribution of output offset voltage drift warm-up drift input bias current input offset current input bias and offset current vs temperature distribution of output offset voltage, t a = C 40c distribution of output offset voltage, t a = 25c distribution of output offset voltage, t a = 85c output offset voltage (v) ? 400 ? 300 ? 200 ? 100 0 100 200 300 400 percent of units (%) 20 30 1167 g43 10 0 40 15 25 5 35 v s = 15v g = 1 137 n8 (2 lots) 165 s8 (3 lots) 302 total parts output offset voltage (v) ? 200 ? 150 ? 100 ? 50 0 50 100 150 200 percent of units (%) 20 30 1167 g44 10 0 15 25 5 v s = 15v g = 1 137 n8 (2 lots) 165 s8 (3 lots) 302 total parts output offset voltage (v) ? 400 ? 300 ? 200 ? 100 0 100 200 300 400 percent of units (%) 20 30 1167 g45 10 0 40 15 25 5 35 v s = 15v g = 1 137 n8 (2 lots) 165 s8 (3 lots) 302 total parts input offset voltage drift (v/c) ? 0.4 0 percent of units (%) 5 10 15 20 30 ? 0.3 ? 0.2 ? 0.1 0 1167 g46 0.1 0.2 0.3 25 v s = 15v t a = ? 40c to 85c g = 1000 137 n8 (2 lots) 165 s8 (3 lots) 302 total parts output offset voltage drift (v/c) 0 percent of units (%) 5 10 15 20 40 0 1 2 3 4 5 ?1?2?3?4?5 1167 g47 30 35 25 v s = 15v t a = ? 40c to 85c g = 1 137 n8 (2 lots) 165 s8 (3 lots) 302 total parts time after power on (minutes) 0 10 12 s8 n8 14 3 4 1167 g09 8 6 1 2 5 4 2 0 change in offset voltage (v) v s = 15v t a = 25c g = 1 input bias current (pa) ? 100 percent of units (%) 30 40 50 60 1167 g10 20 10 0 ? 60 ? 20 20 100 v s = 15v t a = 25c 270 s8 122 n8 392 total parts input offset current (pa) ? 100 percent of units (%) 30 40 50 60 1167 g11 20 10 0 ? 60 ? 20 20 100 v s = 15v t a = 25c 270 s8 122 n8 392 total parts temperature (c) ? 50?75 ? 500 input bias and offset current (pa) ? 400 ? 200 ? 100 0 500 200 0 50 75 1167 g12 ? 300 300 400 100 ?25 25 100 i os 125 v s = 15v v cm = 0v i b
lt1167 9 1167fb typical performance characteristics positive power supply rejection ratio vs frequency gain vs frequency supply current vs supply voltage voltage noise density vs frequency 0.1hz to 10hz noise voltage, g = 1 0.1hz to 10hz noise voltage, referred to input, g = 1000 input bias current vs common mode input voltage common mode rejection ratio vs frequency negative power supply rejection ratio vs frequency common mode input voltage (v) ?15 input bias current (pa) 100 300 500 9 1167 g13 ?100 ? 300 0 200 400 ? 200 ? 400 ? 500 ? 9 ? 3 3 ?12 12 ? 6 0 6 15 ? 40c 85c 0c 70c 25c frequency (hz) 0.1 common mode rejection ratio (db) 60 80 100 100 10k 1167 g14 40 20 0 1 10 1k 120 140 160 100k g = 1000 g = 100 g = 10 g = 1 v s = 15v t a = 25c 1k source imbalance frequency (hz) 0.1 negative power supply rejection ratio (db) 60 80 100 100 10k 1167 g15 40 20 0 1 10 1k 120 140 160 100k g = 1000 g = 100 g = 10 g = 1 v + = 15v t a = 25c frequency (hz) 0.1 positive power supply rejection ratio (db) 60 80 100 100 10k 1167 g16 40 20 0 1 10 1k 120 140 160 100k g = 1000 g = 10 g = 1 v ? = ? 15v t a = 25c g = 100 frequency (khz) 0 gain (db) 10 30 50 60 0.01 1 10 1000 1167 g17 ?10 0.1 100 40 20 ? 20 g = 1000 g = 100 g = 10 g = 1 v s = 15v t a = 25c supply voltage ( v) 0 supply current (ma) 1.00 1.25 85c 25c ? 40c 20 1167 g18 0.75 0.50 5 10 15 1.50 frequency (hz) 1 0 100 1000 10 100 1k 100k 10k 1167 g19 10 voltage noise density (nvhz) v s = 15v t a = 25c 1/f corner = 10hz 1/f corner = 9hz 1/f corner = 7hz gain = 1 gain = 10 gain = 100, 1000 bw limit gain = 1000 time (sec) 0 noise voltage (2v/div) 8 1167 g20 2 4 5 10 6 1 3 9 7 v s = 15v t a = 25c time (sec) 0 noise voltage (0.2v/div) 8 1167 g21 2 4 5 10 6 1 3 9 7 v s = 15v t a = 25c
lt1167 10 1167fb typical performance characteristics overshoot vs capacitive load large-signal transient response small-signal transient response output impedance vs frequency large-signal transient response small-signal transient response current noise density vs frequency 0.1hz to 10hz current noise short-circuit current vs time frequency (hz) 1 10 current noise density (fa/hz) 100 1000 10 100 1000 1167 g22 v s = 15v t a = 25c r s time (sec) 0 current noise (5pa/div) 8 1167 g23 2 4 5 10 6 1 3 9 7 v s = 15v t a = 25c time from output short to ground (minutes) 0 ? 50 (sink) (source) output current (ma) ? 40 ? 20 ? 10 0 50 20 1 2 1167 g24 ? 30 30 40 10 3 t a = ? 40c v s = 15v t a = ? 40c t a = 25c t a = 85c t a = 85c t a = 25c capacitive load (pf) 10 40 overshoot (%) 50 60 70 80 100 1000 10000 1167 g25 30 20 10 0 90 100 v s = 15v v out = 50mv r l = a v 100 a v = 10 a v = 1 10s/div 5v/div 1167 g28 g = 1 v s = 15v r l = 2k c l = 60pf 10s/div 20mv/div 1167 g29 g = 1 v s = 15v r l = 2k c l = 60pf frequency (khz) 1 output impedance () 10 100 1000 10 100 1000 1167 g26 0.1 1 v s = 15v t a = 25c g = 1 to 1000 10s/div 5v/div 1167 g31 g = 1 v s = 15v r l = 2k c l = 60pf 10s/div 20mv/div 1167 g32 g = 10 v s = 15v r l = 2k c l = 60pf
lt1167 11 1167fb typical performance characteristics settling time vs gain large-signal transient response small-signal transient response settling time vs step size slew rate vs temperature output voltage swing vs load current undistorted output swing vs frequency large-signal transient response small-signal transient response frequency (khz) 1 20 25 peak-to-peak output swing (v) 30 35 10 100 1000 1167 g27 15 10 5 0 g = 1 g = 10, 100, 1000 v s = 15v t a = 25c 10s/div 5v/div 1167 g34 g = 100 v s = 15v r l = 2k c l = 60pf 10s/div 20mv/div 1167 g35 g = 100 v s = 15v r l = 2k c l = 60pf gain (db) 1 1 settling time (s) 10 100 1000 10 100 1000 1167 g30 v s = 15v t a = 25c ?v out = 10v 1mv = 0.01% 50s/div 5v/div 1167 g37 g = 1000 v s = 15v r l = 2k c l = 60pf 50s/div 20mv/div 1167 g38 g = 1000 v s = 15v r l = 2k c l = 60pf settling time (s) 2 output step (v) 2 6 10 10 1167 g33 ? 2 ? 6 0 4 8 ? 4 ? 8 ?10 4 6 8 3 11 5 7 9 12 0v v out to 0.1% to 0.1% to 0.01% to 0.01% 0v v out v s = 15 g = 1 t a = 25c c l = 30pf r l = 1k temperature (c) ? 50 ?25 0.8 slew rate (v/s) 1.2 1.8 0 50 75 1167 g36 1.0 1.6 1.4 25 100 125 v s = 15v v out = 10v g = 1 + slew ? slew output current (ma) output voltage swing (v) (referred to supply voltage) + v s + v s ? 0.5 + v s ? 1.0 + v s ? 1.5 + v s ? 2.0 ? v s + 2.0 ? v s + 1.5 ? v s + 1.0 ? v s + 0.5 ? v s 0.01 1 10 100 1167 g39 0.1 v s = 15v 85c 25c ? 40c source sink
lt1167 12 1167fb block diagram theory of operation q1 r g 2 output 6 ref 1167 f01 5 7 ? + a1 ? + a3 vb r1 24.7k r3 400 r4 400 c1 1 r g 8 r7 10k r8 10k r5 10k r6 10k difference amplifier stage preamp stage +in ?in 3 ? + a2 vb r2 24.7k c2 v + v ? v ? v + v ? q2 v ? v + 4 v ? figure 1. block diagram the lt1167 is a modified version of the three op amp instrumentation amplifier. laser trimming and mono - lithic construction allow tight matching and tracking of circuit parameters over the specified temperature range. refer to the block diagram (figure 1) to understand the following circuit description. the collector currents in q1 and q2 are trimmed to minimize offset voltage drift, thus assuring a high level of performance. r1 and r2 are trimmed to an absolute value of 24.7k to assure that the gain can be set accurately (0.05% at g = 100) with only one external resistor r g . the value of r g determines the transconductance of the preamp stage. as r g is reduced for larger programmed gains, the transconductance of the input preamp stage increases to that of the input transistors q1 and q2. this increases the open-loop gain when the programmed gain is increased, reducing the input referred gain related errors and noise. the input voltage noise at gains greater than 50 is determined only by q1 and q2. at lower gains the noise of the difference amplifier and preamp gain setting resistors increase the noise. the gain bandwidth product is determined by c1, c2 and the preamp transconductance which increases with programmed gain. therefore, the bandwidth does not drop proportionally to gain. the input transistors q1 and q2 offer excellent matching, which is inherent in npn bipolar transistors, as well as picoampere input bias current due to superbeta process - ing. the collector currents in q1 and q2 are held constant due to the feedback through the q1-a1-r1 loop and q2-a2-r2 loop which in turn impresses the differential input voltage across the external gain set resistor r g . since the current that flows through r g also flows through r 1 and r2, the ratios provide a gained-up differential voltage, g = (r1 + r2)/r g , to the unity-gain difference amplifier a3. the common mode voltage is removed by a3, resulting in a single-ended output voltage referenced to the voltage on the ref pin. the resulting gain equation is: v out C v ref = g(v in + C v in C ) where: g = (49.4k / r g ) + 1 solving for the gain set resistor gives: r g = 49.4k /(g C 1)
lt1167 13 1167fb theory of operation input and output offset voltage the offset voltage of the lt1167 has two components: the output offset and the input offset. the total offset voltage referred to the input (rti) is found by dividing the output offset by the programmed gain (g) and adding it to the input offset. at high gains the input offset voltage dominates, whereas at low gains the output offset voltage dominates. the total offset voltage is: total input offset voltage (rti) = input offset + (output offset/g) total output offset voltage (rto) = (input offset ? g) + output offset reference terminal the reference terminal is one end of one of the four 10k resistors around the difference amplifier. the output volt - age of the lt1167 (pin 6) is referenced to the voltage on the reference terminal (pin 5). resistance in series with the ref pin must be minimized for best common mode rejection. for example, a 2 resistance from the ref pin to ground will not only increase the gain error by 0.02% but will lower the cmrr to 80db. single supply operation for single supply operation, the ref pin can be at the same potential as the negative supply (pin 4) provided the output of the instrumentation amplifier remains inside the specified operating range and that one of the inputs is at least 2.5v above ground. the barometer application on the front page of this data sheet is an example that satis - fies these conditions. the resistance r b from the bridge transducer to ground sets the operating current for the bridge and also has the effect of raising the input common mode voltage. the output of the lt1167 is always inside the specified range since the barometric pressure rarely goes low enough to cause the output to rail (30.00 inches of hg corresponds to 3.000v). for applications that require the output to swing at or below the ref potential, the voltage on the ref pin can be level shifted. an op amp is used to buffer the voltage on the ref pin since a parasitic series resistance will degrade the cmrr. the application in the back of this data sheet, four digit pressure sensor, is an example. output offset trimming the lt1167 is laser trimmed for low offset voltage so that no external offset trimming is required for most applica - tions. in the event that the offset needs to be adjusted, the circuit in figure 2 is an example of an optional offset adjust circuit. the op amp buffer provides a low impedance to the ref pin where resistance must be kept to minimum for best cmrr and lowest gain error. ? + 2 ?in output +in 1 8 10k 100 100 ?10mv 1167 f02 v ? v + 10mv 5 2 3 1 6 1/2 lt1112 10mv adjustment range r g 3 ? + lt1167 ref figure 2. optional trimming of output offset voltage input bias current return path the low input bias current of the lt1167 (350pa) and the high input impedance (200g) allow the use of high impedance sources without introducing additional offset voltage errors, even when the full common mode range is required. however, a path must be provided for the input bias currents of both inputs when a purely differential signal is being amplified. without this path the inputs will float to either rail and exceed the input common mode range of the lt1167, resulting in a saturated input stage. figure 3 shows three examples of an input bias current path. the first example is of a purely differential signal source with a 10k input current path to ground. since the impedance of the signal source is low, only one resistor is needed. two matching resistors are needed for higher impedance signal sources as shown in the second example. balancing the input impedance improves both common mode rejection and dc offset. the need for input resistors is eliminated if a center tap is present as shown in the third example.
lt1167 14 1167fb applications information theory of operation 10k r g r g r g 1167 f03 thermocouple 200k microphone, hydrophone, etc 200k center-tap provides bias current return ? + lt1167 ? + lt1167 ? + lt1167 figure 3. providing an input common mode current path the lt1167 is a low power precision instrumentation amplifier that requires only one external resistor to accu - rately set the gain anywhere from 1 to 1000. the output can handle capacitive loads up to 1000pf in any gain configuration and the inputs are protected against esd strikes up to 13kv (human body). input current at high common mode voltage when operating within the specified input common mode range, both the lt1167 and lt1167-1 operate as shown in the input bias current vs common mode input voltage graph shown in the typical performance characteristics. if however the inputs are within approximately 0.8v of the positive supply, the lt1167 input current will increase to approximately C1a to C3a. if the impedance of the circuit driving the lt1167 inputs is sufficiently high (e.g., 10m when +v s = 15v), this increased input current can pull the input voltage sufficiently high to keep the elevated input current flowing. the lt1167-1 has been modified so that the input current is typically two orders of magnitude lower under similar conditions. the lt1167-1 is recom - mended for new designs where input impedance is high. input protection the lt1167 can safely handle up to 20ma of input cur - rent in an overload condition. adding an external 5k input resistor in series with each input allows dc input fault voltages up to 100v and improves the esd immunity to 8kv (contact) and 15kv (air discharge), which is the iec 1000-4-2 level 4 specification. if lower value input resistors are needed, a clamp diode from the positive supply to each input will maintain the iec 1000-4-2 specification to level 4 for both air and contact discharge. a 2n4393 drain/source to gate is a good low leakage diode for use with 1k resistors, see figure 4. the input resistors should be carbon and not metal film or carbon film. v ee 1167 f04 v cc v cc v cc j2 2n4393 j1 2n4393 out optional for highest esd protection r g r in r in ? + lt1167 ref figure 4. input protection rfi reduction in many industrial and data acquisition applications, instrumentation amplifiers are used to accurately amplify small signals in the presence of large common mode volt - ages or high levels of noise. typically, the sources of these very small signals (on the order of microvolts or millivolts) are sensors that can be a significant distance from the signal conditioning circuit. although these sensors may be connected to signal conditioning circuitry, using shielded or unshielded twisted-pair cabling, the cabling may act as antennae, conveying very high frequency interference directly into the input stage of the lt1167.
lt1167 15 1167fb applications information the amplitude and frequency of the interference can have an adverse effect on an instrumentation amplifiers input stage by causing an unwanted dc shift in the amplifiers input offset voltage. this well known effect is called rfi rectification and is produced when out-of-band interference is coupled (inductively, capacitively or via radiation) and rectified by the instrumentation amplifiers input transis - tors. these transistors act as high frequency signal detec - tors, in the same way diodes were used as rf envelope detectors in early radio designs. regardless of the type of interference or the method by which it is coupled into the circuit, an out-of-band error signal appears in series with the instrumentation amplifiers inputs. to significantly reduce the effect of these out-of-band signals on the input offset voltage of instrumentation am - plifiers, simple lowpass filters can be used at the inputs. these filters should be located very close to the input pins of the circuit. an effective filter configuration is illustrated in figure 5, where three capacitors have been added to the inputs of the lt1167. capacitors c xcm1 and c xcm2 form lowpass filters with the external series resistors r s1, 2 to any out-of-band signal appearing on each of the input traces. capacitor c xd forms a filter to reduce any unwanted signal that would appear across the input traces. an added benefit to using c xd is that the circuits ac common mode rejection is not degraded due to common mode capacitive imbalance. the differential mode and common mode time constants associated with the capacitors are: t dm(lpf) = (2)(r s )(c xd ) t cm(lpf) = (r s1, 2 )(c xcm1, 2 ) setting the time constants requires a knowledge of the frequency, or frequencies of the interference. once this frequency is known, the common mode time constants can be set followed by the differential mode time constant. to avoid any possibility of inadvertently affecting the signal to be processed, set the common mode time constant an order of magnitude (or more) larger than the differential mode time constant. set the common mode time constants such that they do not degrade the lt1167s inherent ac cmr. then the differential mode time constant can be set for the bandwidth required for the application. setting the differential mode time constant close to the sensors bw also minimizes any noise pickup along the leads. to avoid any possibility of common mode to differential mode signal conversion, match the common mode time constants to 1% or better. if the sensor is an rtd or a resistive strain gauge, then the series resistors r s1, 2 can be omitted, if the sensor is in proximity to the instrumentation amplifier. roll your owndiscrete vs monolithic lt1167 error budget analysis the lt1167 offers performance superior to that of roll your own three op amp discrete designs. a typical ap - plication that amplifies and buffers a bridge transducers differential output is shown in figure 6. the amplifier, with its gain set to 100, amplifies a differential, full-scale output voltage of 20mv over the industrial temperature range. to make the comparison challenging, the low cost version of the lt1167 will be compared to a discrete instrumentation amp made with the a grade of one of the best precision quad op amps, the lt1114a. the lt1167c outperforms the discrete amplifier that has lower v os , lower i b and comparable v os drift. the error budget comparison in table 1 shows how various errors are calculated and how each error affects the total error budget. the table shows the greatest differences between the discrete solution and v ? v + in + in ? 1167 f05 v out r g c xcm1 0.001f c xcm2 0.001f c xd 0.1f r s1 1.6k r s2 1.6k external rfi filter ? + lt1167 f ? 3db 500hz figure 5. adding a simple rc filter at the inputs to an instrumentation amplifier is effective in reducing rectification of high frequency out-of-band signals
lt1167 16 1167fb applications information ? + ? + ? + 350 350 350 350 10v 10k** precision bridge transducer lt1167 monolithic instrumentation amplifier g = 100, r g = 10ppm tc supply current = 1.3ma max ?roll your own? inst amp, g = 100 * 0.02% resistor match, 3ppm/c tracking ** discrete 1% resistor, 100ppm/c tc 100ppm tracking supply current = 1.35ma for 3 amplifiers 1167 f06 r g 499 1/4 lt1114a 1/4 lt1114a 1/4 lt1114a 10k** 202** 10k* 10k* 10k* 10k* ? + lt1167c ref figure 6. roll your own vs lt1167 table 1. roll your own vs lt1167 error budget error source lt1167c circuit calculation roll your own circuit calculation error, ppm of full scale lt1167c roll your own absolute accuracy at t a = 25c input offset voltage, v output offset voltage, v input offset current, na cmr, db 60v/20mv (300v/100)/20mv [(450pa)(350/2)]/20mv 110db[(3.16ppm)(5v)]/20mv 100v/20mv [(60v)(2)/100]/20mv [(450pa)(350)/2]/20mv [(0.02% match)(5v)]/20mv 3000 150 4 790 5000 60 4 500 drift to 85c gain drift, ppm/c input offset voltage drift, v/c output offset voltage drift, v/c (50ppm + 10ppm)(60c) [(0.4v/c)(60c)]/20mv [(6v/c)(60c)]/100/20mv total absolute error (100ppm/c track)(60c) [(1.6v/c)(60c)]/20mv [(1.1v/c)(2)(60c)]/100/20mv 3944 3600 1200 180 5564 6000 4800 66 resolution gain nonlinearity, ppm of full scale typ 0.1hz to 10hz voltage noise, v p-p 15ppm 0.28v p-p /20mv total drift error 10ppm (0.3v p-p )(2)/20mv 4980 15 14 10866 10 21 total resolution error grand total error 29 8953 31 16461 g = 100, vs = 15v all errors are min/max and referred to input. the lt1167 are input offset voltage and cmrr. note that for the discrete solution, the noise voltage specification is multiplied by 2 which is the rms sum of the uncorelated noise of the two input amplifiers. each of the amplifier er - rors is referenced to a full-scale bridge differential voltage of 20mv. the common mode range of the bridge is 5v. the lt1114 data sheet provides offset voltage, offset voltage drift and offset current specifications for the matched op amp pairs used in the error-budget table. even with an excellent matched op amp like the lt1114, the discrete solutions total error is significantly higher than the lt1167s total error. the lt1167 has additional advantages over the discrete design, including lower component cost and smaller size. current source figure 7 shows a simple, accurate, low power program- mable current source. the differential voltage across pins?2 and 3 is mirrored across r g . the voltage across r g is amplified and applied across r x , defining the out - put current. the 50a bias current flowing from pin 5 is buffered by the lt1464 jfet operational amplifier. this
lt1167 17 1167fb applications information ? + 3 +in r x v x i l ?in 8 1 1167 f07 ?v s v s 5 2 3 4 7 6 1/2 lt1464 r g 2 1 load i l = = [(+in) ? (?in)]g r x v x r x g = + 1 49.4k r g ? + lt1167 ref figure 7. precision voltage-to-current converter 2 2 ?in patient ground output 1v/mv +in 1 1 8 r6 1m r7 10k r8 100 1167 f08 a v = 101 pole at 1khz 5 5 4 ?3v ?3v 3v 3v 7 6 8 4 7 6 ? + 1/2 lt1112 1/2 lt1112 r4 30k r3 30k r1 12k c1 0.01f r g 6k 3 3 r2 1m c2 0.47f 0.3hz highpass c3 15nf patient/circuit protection/isolation ? + lt1167 g = 10 + ? figure 8. nerve impulse amplifier has the effect of improving the resolution of the current source to 3pa, which is the maximum i b of the lt1464a. replacing r g with a programmable resistor greatly increases the range of available output currents. nerve impulse amplifier the lt1167s low current noise makes it ideal for high source impedance emg monitors. demonstrating the lt1167s ability to amplify low level signals, the circuit in figure 8 takes advantage of the amplifiers high gain and low noise operation. this circuit amplifies the low level nerve impulse signals received from a patient at pins 2 and 3. r g and the parallel combination of r3 and r4 set a gain of ten. the potential on lt1112s pin 1 creates a ground for the common mode signal. c1 was chosen to maintain the stability of the patient ground. the lt1167s high cmrr ensures that the desired differential signal is amplified and unwanted common mode signals are attenuated. since the dc portion of the signal is not important, r6 and c2 make up a 0.3hz highpass filter. the ac signal at lt1112s pin 5 is amplified by a gain of 101 set by (r7/r8) +1. the parallel combination of c3 and r7 form a lowpass filter that decreases this gain at frequencies above 1khz. the ability to operate at 3v on 0.9ma of supply current makes the lt1167 ideal for battery-powered applications. total supply current for this application is 1.7ma. proper safeguards, such as isolation, must be added to this circuit to protect the patient from possible harm. low i b favors high impedance bridges, lowers dissipation the lt1167s low supply current, low supply voltage operation and low input bias currents optimize it for battery-powered applications. low overall power dis - sipation necessitates using higher impedance bridges. the single supply pressure monitor application (figure 9) shows the lt1167 connected to the differential output of a 3.5k bridge. the bridges impedance is almost an order of magnitude higher than that of the bridge used in the error-budget table. the picoampere input bias currents keep the error caused by offset current to a negligible level. the lt1112 level shifts the lt1167s reference pin and the adcs analog ground pins above ground. the lt1167s and lt1112s combined power dissipation is still less than the bridges. this circuits total supply current is just 2.8ma.
lt1167 18 1167fb typical application applications information ? + 2 3 2 1 1 1 1/2 lt1112 3.5k 5v 3.5k 3.5k 3.5k 8 7 6 1167 f09 5 40k 20k 40k digital data output 4 g = 200 249 3 ref in agnd adc ltc ? 1286 bi technologies 67-8-3 r40kq (0.02% ratio match) ? + lt1167 figure 9. single supply bridge amplifier ac coupled instrumentation amplifier 2 ?in output +in 1 8 r1 500k 1167 ta04 2 3 5 1 6 c1 0.3f ? + 1/2 lt1112 r g 3 f ?3db = 1 (2)(r1)(c1) = 1.06hz ? + lt1167 ref
lt1167 19 1167fb package description n8 package 8-lead pdip (narrow .300 inch) (reference ltc dwg # 05-08-1510) n8 1002 .065 (1.651) typ .045 ? .065 (1.143 ? 1.651) .130 .005 (3.302 0.127) .020 (0.508) min .018 .003 (0.457 0.076) .120 (3.048) min 1 2 3 4 8 7 6 5 .255 .015* (6.477 0.381) .400* (10.160) max .008 ? .015 (0.203 ? 0.381) .300 ? .325 (7.620 ? 8.255) .325 +.035 ?.015 +0.889 ?0.381 8.255 ( ) note: 1. dimensions are inches millimeters *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 inch (0.254mm) .100 (2.54) bsc
lt1167 20 1167fb package description s8 package 8-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) .016 ? .050 (0.406 ? 1.270) .010 ? .020 (0.254 ? 0.508) 45 0? 8 typ .008 ? .010 (0.203 ? 0.254) so8 0303 .053 ? .069 (1.346 ? 1.752) .014 ? .019 (0.355 ? 0.483) typ .004 ? .010 (0.101 ? 0.254) .050 (1.270) bsc 1 2 3 4 .150 ? .157 (3.810 ? 3.988) note 3 8 7 6 5 .189 ? .197 (4.801 ? 5.004) note 3 .228 ? .244 (5.791 ? 6.197) .245 min .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm)
lt1167 21 1167fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. rev date description page number b 01/11 added lt1167-1 to description, absolute maximum ratings, order information, electrical characteristics and applications information section 1-6, 15 revision history (revision history begins at rev b)
lt1167 22 1167fb linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 1998 lt 0111 rev b ? printed in usa related parts typical application 4-digit pressure sensor ? + + ? 2 1 1 1 1 2 r8 392k lt1634ccz-1.25 4 11 1/4 lt1114 ? + 1/4 lt1114 3 5k 5k 5k 5k 9v 9v 5 4 3 2 2 8 lucas nova senor npc-1220-015a-3l 7 6 1167 ta03 5 to 4-digit dvm 4 8 r5 100k r3 51k r4 100k r1 825 r2 12 c1 1f r9 1k r set r6 50k calibration adjust r7 180k 3 12 14 13 6 ? + 1/4 lt1114 10 9 ? + lt1167 g = 60 0.2% accuracy at room temp 1.2% accuracy at 0c to 60c volts 2.800 3.000 3.200 inches hg 28.00 30.00 32.00 part number description comments ltc1100 precision chopper-stabilized instrumentation amplifier best dc accuracy lt1101 precision, micropower, single supply instrumentation amplifier fixed gain of 10 or 100, i s < 105a lt1102 high speed, jfet instrumentation amplifier fixed gain of 10 or 100, 30v/s slew rate lt1168 low power, single resistor programmable instrumentation amplifier i supply = 530a max ltc1418 14-bit, low power, 200ksps adc with serial and parallel i/o single supply 5v or 5v operation, 1.5lsb inl and 1lsb dnl max lt1460 precision series reference micropower; 2.5v, 5v, 10v versions; high precision lt1468 16-bit accurate op amp, low noise fast settling 16-bit accuracy at low and high frequencies, 90mhz gbw, 22v/s, 900ns settling ltc1562 active rc filter lowpass, bandpass, highpass responses; low noise, low distortion, four 2nd order filter sections ltc1605 16-bit, 100ksps, sampling adc single 5v supply, bipolar input range: 10v, power dissipation: 55mw typ

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